Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5664656
Kind Code:
B2
Abstract:
A circuit pattern of a front surface structure (2) is formed in a front surface of a semiconductor wafer (1) and an alignment mark (3) is formed on the front surface of a semiconductor wafer (1). Then, a transparent supporting substrate (12) is attached to the front surface of the semiconductor wafer (1) by a transparent adhesive (11). Then, a resist (13) is applied onto a rear surface of the semiconductor wafer (1). Then, the semiconductor wafer (1) is mounted on a stage (21) of an exposure apparatus, with the supporting substrate (12) down. Then, the alignment mark (3) formed on the front surface of the semiconductor wafer (1) is recognized by a camera (22) which is provided below the stage (21) through the supporting substrate (12) and the adhesive (11) from the lower side of the stage (21) and the positions of the semiconductor wafer (1) and a photomask (24) are aligned with each other. Then, the resist (13) is patterned. Then, a circuit pattern of a rear surface structure is formed in the rear surface of the semiconductor wafer (1) using the resist (13) as a mask.
Inventors:
中嶋 経宏
中澤 治雄
中澤 治雄
Application Number:
JP2012536098A
Publication Date:
February 04, 2015
Filing Date:
September 30, 2010
Export Citation:
Assignee:
富士電機株式会社
International Classes:
H01L21/336; H01L21/02; H01L21/76; H01L29/739; H01L29/78
Domestic Patent References:
| JP2005056917A | 2005-03-03 | |||
| JP2005268238A | 2005-09-29 | |||
| JP3601513B2 | 2004-12-15 | |||
| JP2006019556A | 2006-01-19 | |||
| JP2009188148A | 2009-08-20 | |||
| JP2008286925A | 2008-11-27 | |||
| JP2010092021A | 2010-04-22 |
Foreign References:
| US0007000A | 1850-01-08 |
Attorney, Agent or Firm:
Akinori Sakai