Title:
設定可能モジュールおよびメモリサブシステム
Document Type and Number:
Japanese Patent JP5681704
Kind Code:
B2
Abstract:
A configurable memory subsystem includes a memory module with a circuit board having a first and a second memory-containing device (MCD) pair mounted thereto. Each MCD pair has a first MCD in communication with a second MCD. Each MCD has an input port, an output port, and a memory each communicating with a bridge. In response to a command, the bridge transfers at least one of a portion of a data packet from the input port to the output port or to the memory, or transfers a portion of a memory packet from the memory to the output port. A loop-back device receives the command and the data packet form the first MCD pair and transmits the command and data packet to the second MCD pair.
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Inventors:
ピーター・ビー・ギリンガム
ローランド・シュッツ
ローランド・シュッツ
Application Number:
JP2012511109A
Publication Date:
March 11, 2015
Filing Date:
May 20, 2010
Export Citation:
Assignee:
コンバーサント・インテレクチュアル・プロパティ・マネジメント・インコーポレイテッドＣＯＮＶＥＲＳＡＮＴ ＩＮＴＥＬＬＥＣＴＵＡＬ ＰＲＯＰＥＲＴＹ ＭＡＮＡＧＥＭＥＮＴ ＩＮＣ．
International Classes:
G06F13/16
Attorney, Agent or Firm:
Takahiro Aoyama
西守 Manned
Yasuhiko Murayama
Masatake Shiga
Takashi Watanabe
Keiji Kiuchi
西守 Manned
Yasuhiko Murayama
Masatake Shiga
Takashi Watanabe
Keiji Kiuchi
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