ハイブリッド半導体基板の製造プロセス

Japanese Patent JP5687844

B2

The present invention relates to a method for manufacturing a hybrid semiconductor substrate comprising the steps of (a) providing a hybrid semiconductor substrate comprising a semiconductor-on-insulator (SeOl) region, that comprises an insulating layer over a base substrate and a SeOl layer over the insulating layer, and a bulk semiconductor region, wherein the SeOl region and the bulk semiconductor region share the same base substrate; (b) providing a mask layer over the SeOl region; and (c) forming a first impurity level by doping the SeOl region and the bulk semiconductor region simultaneously such that the first impurity level in the SeOl region is contained within the mask. Thereby avoiding higher number of process steps involved in the manufacturing process of hybrid semiconductor substrate.

JP2003282729	METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
WO/2023/045356	SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR
WO/2023/272881	TRANSISTOR ARRAY AND METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

ブールデル コンスタンチン
グエン ビッチ−イエン
サダーカ マリアム

JP2010097815A

March 25, 2015

April 21, 2010

Click for automatic bibliography generation  

ソイテック

H01L21/8234; H01L21/336; H01L21/76; H01L21/762; H01L21/8244; H01L27/08; H01L27/088; H01L27/11; H01L27/12; H01L29/786

Patent business corporation A valley and Abe patent firm

Previous Patent: メタクリル酸エステルの製造方法

Next Patent: STABILIZING SYSTEM FOR WAVELENGTH OF DIODE LASER IN INFRARED GAS ANALYZER