Title:
インタフェース試験回路及び方法
Document Type and Number:
Japanese Patent JP5697833
Kind Code:
B2
Abstract:
In some embodiments, an apparatus includes conductors, and a transmitter including transmitter test circuitry to embed test properties in test pattern signals, and transmit the test pattern signals to the conductors. In some embodiments, an apparatus includes conductors to carry test pattern signals with embedded test properties, and receiver test circuitry to receive the test pattern signals and extract the test properties and determine whether the extracted test properties match expected test properties. Other embodiments are described and claimed.
Inventors:
Jin Song Sur
Kim hongshi
Angi Jun
Kim hongshi
Angi Jun
Application Number:
JP2007322609A
Publication Date:
April 08, 2015
Filing Date:
November 15, 2007
Export Citation:
Assignee:
Silicon Image, Incorporated
International Classes:
G01R31/28; G01R31/3183
Domestic Patent References:
| JP9006943A | ||||
| JP2004523187A |
Attorney, Agent or Firm:
Shinji Hayami
Satoshi Amagi
Toshio Tanaka
Satoshi Amagi
Toshio Tanaka
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