Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5712058
Kind Code:
B2
Abstract:
In the manufacturing steps of a power-type semiconductor device, after grinding the back surface of the semiconductor wafer, when a metal film is deposited by sputtering deposition over the back surface of the wafer in a preheated state, the wafer is contained in an annular susceptor, and processed. A radial vertical cross section of the annular shape of the susceptor has a first upper surface closer to a horizontal surface for holding a peripheral portion of the top surface of the semiconductor wafer against gravity, and a second upper surface continued to and located outside the first upper surface and closer to a vertical surface for holding a side surface of the semiconductor wafer against lateral displacement.
Inventors:
Tatsuhiko Miura
Application Number:
JP2011124801A
Publication Date:
May 07, 2015
Filing Date:
June 03, 2011
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
C23C14/34; H01L21/683
Domestic Patent References:
| JP2008288451A | ||||
| JP2010021171A | ||||
| JP10242251A | ||||
| JP2006307291A | ||||
| JP9260296A | ||||
| JP2006005271A | ||||
| JP2007266347A |
Foreign References:
| US5326725 |
Attorney, Agent or Firm:
Shizuyo Tamamura