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Title:
駆動制御信号生成回路
Document Type and Number:
Japanese Patent JP5729959
Kind Code:
B2
Abstract:
A drive control signal generating circuit that generates a drive control signal for driving a motor includes an output control circuit that includes a flip-flop in which a state changes by a rotational state signal of the motor crossing a reference value and generates a motor drive control signal according to the state of the flip-flop, a clock generating circuit that generates a clock that defines a time of reading data in the flip-flop of the output control circuit; and a PWM conversion circuit that PWM-converts the drive control signal using the clock as a PWM signal. The clock has a frequency in which the output control circuit operates and has a duty ratio of the PWM signal.

Inventors:
Takashi Ogawa
Takahisa Nakai
Murata Tsutomu
Application Number:
JP2010222251A
Publication Date:
June 03, 2015
Filing Date:
September 30, 2010
Export Citation:
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Assignee:
Semiconductor Components Industries Limited Liability Company
International Classes:
H02P6/06; H02P6/08
Domestic Patent References:
JP2002119080A
JP2005160155A
Attorney, Agent or Firm:
Patent Corporation yki International Patent Office