Title:
構造化された焼結結合層の製造方法及び構造化された焼結結合層を備えている半導体素子
Document Type and Number:
Japanese Patent JP5762632
Kind Code:
B2
Abstract:
A method for producing a sinter layer connection between a substrate and a chip resulting in an electric and thermal connection therebetween and in reduced mechanical tensions within the chip. The method produces a sinter layer by applying a multitude of sinter elements of a base material forming the sinter layer in structured manner on a contact area of a main surface of a substrate; placing a chip to be joined to the substrate on the sinter elements; and heating and compressing the sinter elements to produce a structured sinter layer connecting the substrate and chip and extending within the contact area, the surface coverage density of the sinter elements on the substrate in a center region of the contact area being greater than the surface coverage density of the sinter elements in an edge region of the contact area, and at least one through channel, extending laterally as to the substrate's main surface being provided towards the contact area's edge. A large-area sinter element is situated in the contact area's center region, and circular sinter elements is situated in a contact area edge region. The sinter elements may also have notches. Also described is a related device.
Inventors:
Michael Gueno
Michael Gunther
Thomas hairboat
Michael Gunther
Thomas hairboat
Application Number:
JP2014516395A
Publication Date:
August 12, 2015
Filing Date:
June 26, 2012
Export Citation:
Assignee:
ROBERT BOSCH GMBH
International Classes:
H01L21/60; H01L23/36
Domestic Patent References:
| JP2009054893A | ||||
| JP2008010703A | ||||
| JP2004253703A | ||||
| JP2006237429A | ||||
| JP6302628A | ||||
| JP2011071301A |
Foreign References:
| EP2075835A1 |
Attorney, Agent or Firm:
Einzel Felix-Reinhard
Takuya Kuno
Takuya Kuno