Title:
半導体装置
Document Type and Number:
Japanese Patent JP5783241
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce the thermal resistance of a semiconductor device, and to provide a technique capable of miniaturizing the semiconductor device.SOLUTION: A semiconductor device has a plurality of unit transistors Q. The semiconductor device has transistor formation regions 3a, 3b, 3e, 3f having a first number (7) of unit transistors Q, and has transistor formation regions 3c, 3d having a second number (4) of unit transistors Q. The transistor formation regions 3c, 3d are arranged between the transistor formation regions 3a, 3b and the transistor formation regions 3e, 3f, and the first number is larger than the second number. The unit transistors comprise a collector layer, a base layer, and an emitter layer. An emitter mesa layer that is electrically connected with the emitter layer is formed on the emitter layer. A ballast resistance layer that is electrically connected with the emitter layer is formed on this emitter mesa layer.
Inventors:
Satoshi Sasaki
Yasunari Umemoto
Yasuo Ozone
Tsutomu Kobori
Kusano Tadashiro
Isao Obe
Kenji Sasaki
Yasunari Umemoto
Yasuo Ozone
Tsutomu Kobori
Kusano Tadashiro
Isao Obe
Kenji Sasaki
Application Number:
JP2013269060A
Publication Date:
September 24, 2015
Filing Date:
December 26, 2013
Export Citation:
Assignee:
MURATA MANUFACTURING CO.,LTD.
International Classes:
H01L21/8222; H01L21/331; H01L21/822; H01L27/04; H01L27/06; H01L29/737
Domestic Patent References:
JP2001127071A | ||||
JP2001007120A | ||||
JP2002217378A | ||||
JP2001274636A |
Attorney, Agent or Firm:
Yamato Tsutsui
Atsushi Sugada
Akiko Tsutsui
Tetsuya Sakaji
Atsushi Sugada
Akiko Tsutsui
Tetsuya Sakaji
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