Title:
電子デバイスの製造方法
Document Type and Number:
Japanese Patent JP5813227
Kind Code:
B2
Abstract:
A method for producing an electrical component, comprises providing a ceramic semiconducting base body (10) having a surface (O10) and a first side area (S10a) lying opposite the surface (O10), wherein a metallic layer (40) is contained within the base body. After at least two further metallic layers (210) have been arranged separately from one another on the side area (S10a) of the base body, the arrangement is sintered. An electrically insulating layer (30) is arranged between the at least two further metallic layers (210). A respective contact layer (220) is arranged on the metallic layers (210) by means of a chemical process. In this case, the material of the base body (10) is removed proceeding from the surface (O10) of the base body (10) at most as far as the metallic layer (40) arranged within the base body.
Inventors:
Feichtinger, Thomas
Brunner, Sebastian
Brunner, Sebastian
Application Number:
JP2014522103A
Publication Date:
November 17, 2015
Filing Date:
July 26, 2012
Export Citation:
Assignee:
EPCOS AG
International Classes:
H01C17/28; H01C1/142; H01C7/04; H01C7/10
Domestic Patent References:
| JP11283803A | ||||
| JP2006173159A | ||||
| JP10508430A | ||||
| JP6302406A | ||||
| JP10335114A | ||||
| JP10149901A | ||||
| JP1154301A |
Foreign References:
| WO2011024724A1 |
Attorney, Agent or Firm:
Koji Nagato