Title:
半導体装置およびその製造方法
Document Type and Number:
Japanese Patent JP5816539
Kind Code:
B2
Abstract:
The performances of a semiconductor device are improved. The device includes a first MISFET in which hafnium is added to the gate electrode side of a first gate insulation film including silicon oxynitride, and a second MISFET in which hafnium is added to the gate electrode side of a second gate insulation film including silicon oxynitride. The hafnium concentration in the second gate insulation film of the second MISFET is set smaller than the hafnium concentration in the first gate insulation film of the first MISFET; and the nitrogen concentration in the second gate insulation film of the second MISFET is set smaller than the nitrogen concentration in the first gate insulation film of the first MISFET. As a result, the threshold voltage of the second MISFET is adjusted to be smaller than the threshold voltage of the first MISFET.
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Inventors:
Hiromasa Yoshimori
Hirofumi Shinohara
Toshiaki Iwamatsu
Hirofumi Shinohara
Toshiaki Iwamatsu
Application Number:
JP2011265852A
Publication Date:
November 18, 2015
Filing Date:
December 05, 2011
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H01L21/8234; H01L21/283; H01L21/8238; H01L27/088; H01L27/092; H01L29/423; H01L29/49
Domestic Patent References:
JP2010161299A | ||||
JP2006332179A | ||||
JP2011009321A | ||||
JP2008288465A | ||||
JP2007288096A | ||||
JP2005038936A | ||||
JP2003008011A | ||||
JP2006093670A | ||||
JP2011044580A | ||||
JP2010157587A |
Foreign References:
WO2007040057A1 | ||||
US20100176455 | ||||
US20100330812 | ||||
US20060267116 | ||||
US20080283928 | ||||
US20050014352 | ||||
US20120139055 |
Attorney, Agent or Firm:
Yamato Tsutsui
Atsushi Sugada
Akiko Tsutsui
Tetsuya Sakaji
Atsushi Sugada
Akiko Tsutsui
Tetsuya Sakaji