Title:
複数のコード・タイプをプログラマブル復号する方法および装置
Document Type and Number:
Japanese Patent JP5840741
Kind Code:
B2
Abstract:
Methods and apparatus are provided for programmable decoding of a plurality of code types. A method is provided for decoding data encoded using one of a plurality of code types, where each of the code types correspond to a communication standard. The code type associated with the data is identified and the data is allocated to a plurality of programmable parallel de-coders. The programmable parallel decoders can be reconfigured to decode data encoded using each of the plurality of code types. A method is also provided for interleaving data among M parallel decoders using a communications network. An interleaver table is employed, wherein each entry in the interleaver table identifies one of the M parallel decoders as a target decoder and a target address of a communications network for interleaved data. Data is interleaved by writing the data to the target address of the communications network. The communications network can comprise, for example, a cross-bar switch and/or one or more first-in-first-out buffers.
Inventors:
Andrew, Alexander
Gribok, Sir Jay
Iz Yumin, Oleg
Sepanovic, Ranco
Viktoria Tonteve, Igoa
Vukovic, Vojslav
Gribok, Sir Jay
Iz Yumin, Oleg
Sepanovic, Ranco
Viktoria Tonteve, Igoa
Vukovic, Vojslav
Application Number:
JP2014140362A
Publication Date:
January 06, 2016
Filing Date:
July 08, 2014
Export Citation:
Assignee:
LSI LOGIC CORPORATION
International Classes:
H03M13/27; H03M13/45
Domestic Patent References:
| JP2008118628A | ||||
| JP2007214918A | ||||
| JP2000316033A | ||||
| JP884162A |
Foreign References:
| US20080002657 |
Other References:
Myoung-Cheol Shin et al.,A programmable turbo decoder for multiple 3G wireless standards,Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International,2003年 2月13日
久保田周治 他,ソフトウェア無線技術の動向,情報処理学会研究報告,2001年 1月12日,Vol.2001, No.2,pp.41-48
Vincent C. Gaudet et al.,Programmable interleaver design for analog iterative decoders,Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on,2002年 7月,Vol.49, No.7,pp.457-464
Guido Masera et al.,Implementation of a Flexible LDPC Decoder,Circuits and Systems II: Express Briefs, IEEE Transactions on,2007年 6月,Vol.54, No.6,pp.542-546
久保田周治 他,ソフトウェア無線技術の動向,情報処理学会研究報告,2001年 1月12日,Vol.2001, No.2,pp.41-48
Vincent C. Gaudet et al.,Programmable interleaver design for analog iterative decoders,Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on,2002年 7月,Vol.49, No.7,pp.457-464
Guido Masera et al.,Implementation of a Flexible LDPC Decoder,Circuits and Systems II: Express Briefs, IEEE Transactions on,2007年 6月,Vol.54, No.6,pp.542-546
Attorney, Agent or Firm:
Satoshi Furuya
Akihiro Onishi
Kiyoharu Nishiyama
Rei Hosoi
Akihiro Onishi
Kiyoharu Nishiyama
Rei Hosoi