Title:
故障検出システム、取出装置、故障検出方法、プログラム及び記録媒体
Document Type and Number:
Japanese Patent JP5845187
Kind Code:
B2
Abstract:
It is a purpose of the invention to provide a fault detection system, etc., having improved fault coverage with a reduced number of test patterns to be input to a logic circuit. The fault detection system detects a fault in a logic circuit based on multiple output logic values of the logic circuit after a test input pattern is input. The output logic values are input to the logic circuit as an updated test input pattern. The system comprises: a first acquisition unit which acquires a part of or all of the output logic values; a comparison unit which compares the logic values acquired by the first acquisition unit with those predicted for when there are no faults, or for when there is a specific fault; and a fault judgment unit which judges whether or not there is a fault based on the comparison result obtained by the comparison unit.
Inventors:
Yasuo Sato
Seiji Kajiwara
Seiji Kajiwara
Application Number:
JP2012537651A
Publication Date:
January 20, 2016
Filing Date:
September 28, 2011
Export Citation:
Assignee:
Japan Science and Technology Agency
International Classes:
G01R31/3183; H01L21/822; H01L27/04
Domestic Patent References:
| JP2005134180A | 2005-05-26 | |||
| JP2006058152A | 2006-03-02 | |||
| JP2006012234A | 2006-01-12 | |||
| JP2004301653A | 2004-10-28 | |||
| JP2005134180A | 2005-05-26 | |||
| JP2006058152A | 2006-03-02 | |||
| JP2006012234A | 2006-01-12 | |||
| JP2004301653A | 2004-10-28 |
Attorney, Agent or Firm:
Koji Hadachi