Title:
多結晶シリコン・ゲート上のサリサイドの抵抗を改善するための方法およびデバイス
Document Type and Number:
Japanese Patent JP5902748
Kind Code:
B2
Abstract:
A method and device for improved salicide resistance in polysilicon gates under 0.20 mum. The several embodiments of the invention provide for formation of gate electrode structures with recessed and partially recessed spacers. One embodiment, provides a gate electrode structure with recessed thick inner spacers and thick outer spacers. Another embodiment provides a gate electrode structure with recessed thin inner spacers and recessed thick outer spacers. Another embodiment provides a gate electrode structure with thin inner spacers and partially recessed outer spacers. Another embodiment provides a gate electrode structure with two spacer stacks. The outermost spacer stack with recessed thin inner spacers and recessed thick outer spacers. The inner spacer stack within inner spacers and thin outer spacers. Another embodiment provides a gate electrode structure with two spacer stacks. The outermost spacer stack with recessed thin inner spacers and recessed thick outer spacers. The inner spacer stack with recessed thin inner spacers and recessed thin outer spacers.
Inventors:
Jean, Cha Hong
Rhino, julie ai
Yang, Simon
Garni tahir
Whitehill, Kevin A.
Keating, Stephen Jay
Alan Myers
Rhino, julie ai
Yang, Simon
Garni tahir
Whitehill, Kevin A.
Keating, Stephen Jay
Alan Myers
Application Number:
JP2014095009A
Publication Date:
April 13, 2016
Filing Date:
May 02, 2014
Export Citation:
Assignee:
INTEL CORPORATION
International Classes:
H01L21/336; H01L21/28; H01L21/8234; H01L29/41; H01L29/423; H01L29/49; H01L29/78
Domestic Patent References:
JP9074199A | ||||
JP8037301A | ||||
JP11204784A | ||||
JP9148568A | ||||
JP5090293A | ||||
JP11074509A | ||||
JP10223889A | ||||
JP7066406A | ||||
JP7201775A | ||||
JP10242464A |
Foreign References:
US5739573 |
Attorney, Agent or Firm:
Masaki Yamakawa
Shigeki Yamakawa
Shigeki Yamakawa