Title:
アラーム出力回路
Document Type and Number:
Japanese Patent JP6311228
Kind Code:
B2
Abstract:
An alarm output circuit can cope with simultaneous generations of a plurality of alarm factors based on alarm signals output from one output terminal. The alarm output circuit notifies externally of generations of alarm factors in an intelligent power module. A digital/analog converter, into which digital data indicating the presences and absences of generations of the alarm factors is input, outputs corresponding voltages. A voltage control oscillator outputs a signal of a frequency corresponding to an output voltage of the digital/analog converter.
Inventors:
Yoshinari Minoya
Application Number:
JP2013141586A
Publication Date:
April 18, 2018
Filing Date:
July 05, 2013
Export Citation:
Assignee:
Fuji Electric Co., Ltd.
International Classes:
H03K17/08; H02M1/00
Domestic Patent References:
| JP11017508A | ||||
| JP5039021U | ||||
| JP2007082360A | ||||
| JP2001261192A | ||||
| JP2002027665A |
Attorney, Agent or Firm:
Shoichi Okuyama
Arihara Koichi
Matsushima Tetsuo
Hidefumi Kawamura
Ayako Nakamura
Satoshi Morimoto
Kyoko Tsunoda
Yu Tanaka
Tokumoto Koichi
Atsushi Watanabe
Arihara Koichi
Matsushima Tetsuo
Hidefumi Kawamura
Ayako Nakamura
Satoshi Morimoto
Kyoko Tsunoda
Yu Tanaka
Tokumoto Koichi
Atsushi Watanabe