Title:
エラー監視装置、方法およびプログラム
Document Type and Number:
Japanese Patent JP6508340
Kind Code:
B2
Abstract:
In order to enable to estimate whether the bit error occurs steadily or instantaneously, an error monitoring method according to an exemplary aspect of the invention includes: detecting number of error bits of received data per bits whose number is predetermined, comparing the number of error bits with a threshold value which is predetermined, and counting and outputting number of times of continuous occurrence of the comparison result's indicating being large, and number of times of continuous occurrence of the comparison result's indicating being small.
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Inventors:
Kitamura Takeshi
Application Number:
JP2017535239A
Publication Date:
May 08, 2019
Filing Date:
August 17, 2016
Export Citation:
Assignee:
NEC
International Classes:
H04L1/00
Domestic Patent References:
| JP2001203673A | ||||
| JP6268633A | ||||
| JP2002158739A |
Attorney, Agent or Firm:
Masahiko Desk
Naoki Shimosaka
Naoki Shimosaka