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Title:
無洗浄フラックス、および半導体パッケージの製造方法
Document Type and Number:
Japanese Patent JP6513950
Kind Code:
B2
Abstract:
The invention of the present application provides a washless flux comprising (A) a solvent having such a property that the temperature at which the mass thereof is reduced to 50% of the original value is 160 to 210ºC as measured by a thermogravimetric analysis and (B) a di- or tri-carboxylic acid having such a property that the temperature at which the mass thereof is reduced to 50% of the original value is 190 to 320°C as measured by a thermogravimetric analysis, wherein the component (B) is contained in an amount of 0.3 to 3.0 parts by mass relative to 100 parts by mass of the washless flux. The washless flux can be used in a semiconductor packaging process comprising: applying the washless flux between a solder bump, which is formed on a semiconductor chip, and a wiring line, which is formed on a substrate and is coated with a solder, at room temperature; soldering the solder bump with the wiring line; cooling the soldered product to 100 to 120°C; filling an underfill material between the semiconductor chip and the substrate while keeping at the same temperature; and curing the underfill material.

More Like This:
JPH02175094CREAM SOLDER
WO/2013/150635FLUX AND SOLDER PASTE
Inventors:
Yuki Nishisako
Yasuo Shirai
Osamu Suzuki
Application Number:
JP2015001498A
Publication Date:
May 15, 2019
Filing Date:
January 07, 2015
Export Citation:
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Assignee:
Namics Co., Ltd.
International Classes:
B23K35/363; B23K1/00; B23K31/02; H01L21/60; H05K3/28; H05K3/34
Domestic Patent References:
JP2004025305A
JP2013091093A
JP2009246356A
Foreign References:
CN101058135A
Attorney, Agent or Firm:
Yusuke Watanabe