Title:
配列基板と、表示パネルと、配列基板の調製方法
Document Type and Number:
Japanese Patent JP6570640
Kind Code:
B2
Abstract:
The invention provides an array substrate, a display panel and a method for preparing an array substrate. The array substrate includes multiple low temperature poly-silicon (LTPS) thin film transistors arranged in an array. Each LTPS thin film transistor includes: a substrate; a LTPS layer, a source, a drain and a first conductive layer disposed on a same surface of the substrate, the source and the drain respectively being arranged at two sides of the LTPS layer and electrically connected with the LTPS layer, the drain being electrically connected with the first conductive layer; an insulating layer disposed on the LTPS layer, the source, the drain and the first conductive layer; a gate disposed on the insulating layer and corresponding to the LTPS layer; a passivation layer disposed on the gate; and a second conductive layer disposed on the passivation layer and corresponding to the first conductive layer.
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Inventors:
King Satoshi
Du Peng
Chen Rex
Du Peng
Chen Rex
Application Number:
JP2017534675A
Publication Date:
September 04, 2019
Filing Date:
January 21, 2015
Export Citation:
Assignee:
SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
International Classes:
G02F1/1368; G02F1/1343; G09F9/00; G09F9/30; H01L21/336; H01L29/786
Domestic Patent References:
| JP2013228668A |
Foreign References:
| CN102651403A |
Attorney, Agent or Firm:
Yoneda Koichiro
Seishiro Suzuki
Seishiro Suzuki