Title:
半導体装置及び電池電圧の測定方法
Document Type and Number:
Japanese Patent JP6624782
Kind Code:
B2
Abstract:
A semiconductor device including a first buffer amplifier into which a voltage of a high potential side of one battery cell selected from plural battery cells that are connected in series is input; a second buffer amplifier into which a voltage of a low potential side of the one battery cell other than a lowermost stage battery cell is input; an analog level shifter into which a voltage output from the first buffer amplifier and a voltage output from the buffer amplifier are input; a first switch that switches a voltage input to the analog level shifter from the voltage output from the second buffer amplifier to a reference voltage; and a second switch that switches a voltage input to the first buffer amplifier from the voltage of the high potential side of the one battery cell to the reference voltage.
Inventors:
Naoaki Sugimura
Application Number:
JP2014263050A
Publication Date:
December 25, 2019
Filing Date:
December 25, 2014
Export Citation:
Assignee:
LAPIS Semiconductor Co., Ltd.
International Classes:
G01R19/00; H01M10/44; H01M10/48; H02J7/02
Domestic Patent References:
JP2012078136A | ||||
JP2010109523A | ||||
JP2011232161A | ||||
JP2006153780A | ||||
JP2002204537A | ||||
JP2009159769A | ||||
JP2001111424A | ||||
JP46027264Y1 | ||||
JP2002357624A | ||||
JP2013096770A | ||||
JP2003282158A |
Foreign References:
US20110298480 | ||||
US20080084217 |
Attorney, Agent or Firm:
Atsushi Nakajima
Kato Kazunori
Hiroshi Fukuda
Kato Kazunori
Hiroshi Fukuda