Title:
半導体検査装置
Document Type and Number:
Japanese Patent JP6695858
Kind Code:
B2
Abstract:
A semiconductor test apparatus capable of securely having the contact pin and the external contact terminal held in contact with each other even in case where the vertical type handler is used. The semiconductor test apparatus comprises: a test socket having a socket surface formed thereon, the socket surface having a contact pin towering therefrom; and a semiconductor transport fixture having a concave portion formed thereon, the concave portion adapted to receive therein an IC under test, wherein the test socket has a position adjustment guide provided thereon, the semiconductor transport fixture has a guide through bore formed therein, the guide through bore adapted to receive the position adjustment guide therethrough when the IC under test comes under test, and either one of the position adjustment guide or the guide through bore is formed in a tapered shape.
Inventors:
Tomoaki Adachi
Munehiro Yamada
Munehiro Yamada
Application Number:
JP2017508928A
Publication Date:
May 20, 2020
Filing Date:
March 31, 2015
Export Citation:
Assignee:
Unitechno Co., Ltd.
International Classes:
G01R31/26
Domestic Patent References:
| JP647881U | ||||
| JP2305448A |
Attorney, Agent or Firm:
Gunichiro Ariga