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Title:
低レイテンシ通信のためのハイブリッドパイロット設計
Document Type and Number:
Japanese Patent JP6708637
Kind Code:
B2
Abstract:
Methods, systems, and devices are described for wireless communication at a UE. A base station may select a hybrid pilot configuration including a relatively sparse periodic pilot and a dense pilot embedded in one or more symbols of a low latency burst. A user equipment (UE) may generate a long term statistical average channel estimate based on the periodic pilot and an instantaneous channel estimate (e.g., for demodulation) based on the dense pilot embedded in the low latency burst. The UE may refine the instantaneous channel estimate by converting a control channel embedded with the burst. In some instances, the base station may embed the dense pilots in the first symbol of a burst and transmit subsequent low latency symbols with a reduced density pilot (or without pilot tones).

Inventors:
Jin Jiang
Joseph Vinamira Soriaga
Ting Huang Ji
John Edward Smy
Peter girl
Krishna Kiran Mukkavili
Naga Boushan
Alexey Yuryevich Gorokhov
Application Number:
JP2017519477A
Publication Date:
June 10, 2020
Filing Date:
October 06, 2015
Export Citation:
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Assignee:
Qualcomm, Inc.
International Classes:
H04L27/26
Domestic Patent References:
JP2010520701A
JP2009505566A
JP2012005137A
JP2010538527A
JP2012235514A
Foreign References:
US20080310530
Other References:
Motorola,EUTRA Downlink Pilot Requirements and Design,3GPP TSG RAN WG1 #42 R1-050714,2005年 8月29日,URL,http://www.3gpp.org/ftp/tsg_ran/WG1_RL1/TSGR1_42/Docs/R1-050714.zip
Attorney, Agent or Firm:
Yasuhiko Murayama
Kuroda Shinpei