Title:
絶縁層の製造方法および多層印刷回路基板の製造方法
Document Type and Number:
Japanese Patent JP6735819
Kind Code:
B2
Abstract:
The present invention relates to a method for manufacturing an insulating layer which can realize a uniform and fine pattern while improving efficiency in terms of cost and productivity, and also secure excellent mechanical properties, and a method for manufacturing a multilayered printed circuit board using an insulating layer obtained from the method of manufacturing an insulating layer.
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Inventors:
Woo Choi Chung
You Chin Kyung
Byung Ju Choi
Bo Yoon Choi
Kwan Chu Yi
Min Soo Chung
You Chin Kyung
Byung Ju Choi
Bo Yoon Choi
Kwan Chu Yi
Min Soo Chung
Application Number:
JP2018518421A
Publication Date:
August 05, 2020
Filing Date:
August 08, 2017
Export Citation:
Assignee:
LG HAUSYS,LTD.
International Classes:
H05K3/46; G03F7/11
Domestic Patent References:
| JP6268378A | ||||
| JP2008110959A | ||||
| JP2013243176A | ||||
| JP2000124217A |
Foreign References:
| WO2016088757A1 |
Attorney, Agent or Firm:
Shinya Mitsuhiro
Takashi Watanabe
Takashi Watanabe