Title:
半導体装置および半導体装置の製造方法
Document Type and Number:
Japanese Patent JP6759563
Kind Code:
B2
Abstract:
Trenches and n+ high impurity concentration regions are formed in a first principal surface side of a silicon carbide semiconductor substrate. In the n+ high impurity concentration regions, third n-type regions that respectively surround first p+ base regions contacting a p-type base layer and have a higher impurity concentration than the n+ high impurity concentration regions, as well as fourth n-type regions that respectively surround second p+ base regions formed at the bottoms of the trenches and also have a higher impurity concentration than the n+ high impurity concentration regions, are formed.
Inventors:
Yasuyuki Hoshi
Application Number:
JP2015223774A
Publication Date:
September 23, 2020
Filing Date:
November 16, 2015
Export Citation:
Assignee:
Fuji Electric Co., Ltd.
International Classes:
H01L29/78; H01L21/336; H01L29/06; H01L29/12
Domestic Patent References:
| JP2015072999A | ||||
| JP2014099670A | ||||
| JP2013258369A | ||||
| JP2011253837A | ||||
| JP2012169384A | ||||
| JP2012169385A |
Attorney, Agent or Firm:
Akinori Sakai