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Title:
異常検出装置及び異常検出方法
Document Type and Number:
Japanese Patent JP6767078
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an abnormality detection device and an abnormality detection method which can detect abnormality that a clock frequency cannot be switched from a high frequency to a low frequency.SOLUTION: An abnormality detection device includes: an abnormality determination section 124 for determining whether a state that a clock frequency of a CPU 12 is a high frequency continues beyond an allowed time; a reset section 125 for resetting the CPU 12 when the abnormality determination section 124 determines the exceedance of the allowed time; and a recovery section 126 for setting the clock frequency to a low frequency after the reset section 125 resets the CPU 12.SELECTED DRAWING: Figure 1

Inventors:
Nobuhito Kamakura
Matsuura Tomo
Application Number:
JP2017057483A
Publication Date:
October 14, 2020
Filing Date:
March 23, 2017
Export Citation:
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Assignee:
Azbil Co., Ltd.
International Classes:
G01F1/00; G01D3/08; G01F3/22; G06F1/04
Domestic Patent References:
JP5478479B2
JP5806529B2
JP3529207B2
JP11167441A
Attorney, Agent or Firm:
Hamada Hatsune
Nakashima Shigeru
Tatsuya Sakamoto
Tsujioka Masaaki
Kazuma Inoue