Title:
ネットワーク負荷に基づいてプロセッサ電力使用を調整する装置及び方法
Document Type and Number:
Japanese Patent JP6818687
Kind Code:
B2
Abstract:
In an embodiment, a system includes a processor that includes a plurality of cores and a plurality of queue. Each queue includes storage locations to store packets to be processed by at least one of the cores. Each queue has a corresponding state that is one of active and inactive. Each active queue is enabled to store an incoming packet, and each inactive queue is disabled from storage of the incoming packet. Each queue has a corresponding queue depth that includes a count of occupied storage locations of the queue. The system also includes packet distribution logic to determine whether to change the state of a first queue of the plurality of queues from a first state to a second state based on a total queue depth that includes a sum of the queue depths of the active queues. Other embodiments are described and claimed.
Inventors:
Brown, john
McNamara, Chris
McNamara, Chris
Application Number:
JP2017544628A
Publication Date:
January 20, 2021
Filing Date:
March 16, 2016
Export Citation:
Assignee:
Intel Corporation
International Classes:
G06F1/3228
Domestic Patent References:
| JP3262074A | ||||
| JP2012181656A | ||||
| JP2013513891A | ||||
| JP2013149221A | ||||
| JP2008129846A |
Foreign References:
| US20140258759 | ||||
| US20130060555 | ||||
| US20110145615 | ||||
| US20130191613 |
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Shinsuke Onuki
Tadahiko Ito
Shinsuke Onuki