Title:
基板電圧制御回路
Document Type and Number:
Japanese Patent JP6831752
Kind Code:
B2
Abstract:
A substrate voltage control circuit comprising: a first connection terminal; a second connection terminal; a substrate voltage control terminal; a first switch having a first source, a first drain, and a first gate, the first source being connected to the substrate voltage control terminal, the first drain being connected to the first connection terminal; a first resistor connected between the first gate and the second connection terminal; a second switch having a second source, a second drain, and a second gate, the second source being connected to the substrate voltage control terminal, the second drain being connected to the second connection terminal; and a second resistor connected between the second gate and the first connection terminal.
Inventors:
Kazuhiro Adachi
Application Number:
JP2017104661A
Publication Date:
February 17, 2021
Filing Date:
May 26, 2017
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
H01L21/822; H01L21/337; H01L21/338; H01L27/04; H01L29/778; H01L29/808; H01L29/812; H01L29/861; H01L29/868; H02M1/08; H03K19/094
Domestic Patent References:
JP5152526A | ||||
JP2014155227A | ||||
JP2014011233A | ||||
JP2005137196A | ||||
JP2006209957A | ||||
JP2014161186A |
Foreign References:
US5767733 | ||||
US20060220727 | ||||
US20150098159 | ||||
US8530284 |
Attorney, Agent or Firm:
Etsushi Kotani
Masataka Otani
Koji Nishitani
Masataka Otani
Koji Nishitani