Title:
電気回路基板および同型の基板の製造方法
Document Type and Number:
Japanese Patent JP6894425
Kind Code:
B2
Abstract:
A substrate (1, 10) for electrical circuits, comprising at least one metal layer (2,3, 14) and a paper ceramic layer (11), which is joined face to face with the at least one metal layer (2,3, 14) and has a top side and bottom side (11a, 11b), wherein the paper ceramic layer (11) has a large number of cavities in the form of pores. Especially advantageously, the at least one metal layer (2, 3, 14) is connected to the paper ceramic layer (11) by means of at least one glue layer (6, 6a, 6b), which is produced by applying at least one glue (6a′, 6a″, 6b′, 6b″) to the metal layer (2,3, 14) and/or to the paper ceramic layer (11), wherein the cavities in the form of pores in the paper ceramic layer (11) are filled at least at the surface by means of the applied glue (6a′, 6a″, 6b′,6b″).
Inventors:
Mayer, Andreas
Schmid, Karlsten
Schmid, Karlsten
Application Number:
JP2018500927A
Publication Date:
June 30, 2021
Filing Date:
July 18, 2016
Export Citation:
Assignee:
Rogers Germany GmbH
International Classes:
H05K1/03; B32B15/04; C25D11/04; C25D11/16; H01L23/36; H05K1/02
Domestic Patent References:
| JP8213511A | ||||
| JP46035300B1 | ||||
| JP51040563A | ||||
| JP3239390A | ||||
| JP63274197A | ||||
| JP2011159796A | ||||
| JP2012099782A | ||||
| JP2009105394A | ||||
| JP2005064168A | ||||
| JP2013251515A | ||||
| JP62214632A |
Foreign References:
| EP2068361A1 | ||||
| KR100934476B1 |
Attorney, Agent or Firm:
Mamoru Kuwagaki
▲吉▼川 俊雄
Kana Ichikawa
▲吉▼川 俊雄
Kana Ichikawa