Title:
半導体装置の製造装置および半導体装置の製造方法
Document Type and Number:
Japanese Patent JP6895927
Kind Code:
B2
Abstract:
There is provided a technique capable of forming a plating film excellent in film thickness and quality uniformity on a to-be-plated surface of a semiconductor wafer while suppressing an increase in costs of facilities. An apparatus for manufacturing a semiconductor device includes: a reaction bath; a supply pipe provided inside the reaction bath and including a plurality of ejection holes for ejecting the reaction solution, the ejecting holes being arranged in a longitudinal direction of the supply pipe; and an outer bath serving as a reservoir bath provided adjacent to the reaction bath on a first end side of the supply pipe and storing therein the reaction solution overflowed the reaction bath. The aperture ratio of part of the ejection holes more distant from the outer bath is at least partially higher than that of part of the ejection holes closer to the outer bath.
Inventors:
Shotaro Nakamura
Application Number:
JP2018101202A
Publication Date:
June 30, 2021
Filing Date:
May 28, 2018
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
C23C18/31; C23C18/18; H01L21/288
Domestic Patent References:
| JP2011042832A | ||||
| JP2014234539A | ||||
| JP6179976A | ||||
| JP8120462A | ||||
| JP8335335A | ||||
| JP45022662B1 | ||||
| JP2002093837A | ||||
| JP200957593A |
Foreign References:
| WO2008072403A1 |
Attorney, Agent or Firm:
Yoshitake Hidetoshi
Takahiro Arita
Takahiro Arita