Title:
半導体デバイスの製造方法
Document Type and Number:
Japanese Patent JP6905040
Kind Code:
B2
Abstract:
To provide a method for manufacturing a semiconductor device with high electric connection reliability.SOLUTION: A method for manufacturing a semiconductor device comprises a preparing step and a forming step. The preparing step prepares a member in which a first element part, a first wiring part including a first wiring pattern, and a second wiring part including a second wiring pattern, and a second element part are laminated in this order. The forming step forms a conductive member in contact with both the first wiring pattern and the second wiring pattern so that the first wiring pattern and the second wiring pattern are electrically connected. The forming step further includes a first step and a second step. The first step forms a connection hole penetrating the first wiring pattern and reaching the second wiring pattern. The second step forms a layer containing at least a titanium layer, a titanium compound layer, a tantalum layer, or a tantalum compound layer so as to come into contact with the first wiring pattern and the second wiring pattern in the connection hole, and then provides copper, aluminum, or tungsten.SELECTED DRAWING: Figure 2
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Inventors:
Mariko Furuta
Application Number:
JP2019223945A
Publication Date:
July 21, 2021
Filing Date:
December 11, 2019
Export Citation:
Assignee:
Canon Inc
International Classes:
H01L21/3205; H01L21/768; H01L23/522; H01L23/532; H01L27/146
Domestic Patent References:
| JP2009532874A | ||||
| JP2009505401A | ||||
| JP2010103433A | ||||
| JP2010114320A | ||||
| JP2001044280A | ||||
| JP2011096851A | ||||
| JP2011091400A |
Attorney, Agent or Firm:
Takuma Abe
Sogo Kuroiwa
Sogo Kuroiwa