Title:
半導体装置及び半導体装置の製造方法
Document Type and Number:
Japanese Patent JP6947685
Kind Code:
B2
Abstract:
To provide a semiconductor device capable of detecting a factor of a formation failure of a transistor.SOLUTION: A semiconductor device comprises: a semiconductor substrate; an inter-layer insulation film formed on the semiconductor substrate; and a first test pattern. The semiconductor substrate includes: a base layer; an insulation layer formed on the base layer; and a semiconductor layer formed on the insulation layer. The first test pattern includes: a first wiring pattern formed on the inter-layer insulation film; a plurality of second wiring pattern formed on the inter-layer insulation film; a third wiring pattern formed on the inter-layer insulation film; a first activation region formed on the base layer; a plurality of second activation regions formed on the semiconductor layer; a first contact plug formed in the inter-layer insulation film on the first activation region; and a pair of second contact plug and third contact plug which is formed in the inter-layer insulation film on each of the plurality of second activation regions.SELECTED DRAWING: Figure 3
Inventors:
Hiroki Shinkawada
Application Number:
JP2018090296A
Publication Date:
October 13, 2021
Filing Date:
May 09, 2018
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H01L21/66
Domestic Patent References:
| JP8032040A | ||||
| JP2015023132A | ||||
| JP2003163275A |
Attorney, Agent or Firm:
Fukami patent office