Document Type and Number:
Japanese Patent JPH0231439
Kind Code:
B2
Abstract:
When a receiver supplies both an address signal and a test instruction signal to a given terminal unit, a test voltage generator forming a sensor test circuit of this terminal unit supplies a predetermined test voltage to a corresponding sensor. This sensor generates an analog signal obtained by superimposing the test voltage on the normally detected voltage. The analog signal is A/D-converted, and a resultant digital signal is received by the receiver, thereby allowing a test for operating conditions of any sensor at the site of the receiver. The test voltage generator may generate a plurality of stepwise voltage components to readily check operating characteristics (e.g., overload characteristic) of the sensor.
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Inventors:
TANAKA HIROSHI
KIMURA TETSUO
TANAKA SEIICHI
SUZUKI TAKASHI
KIMURA TETSUO
TANAKA SEIICHI
SUZUKI TAKASHI
Application Number:
JP15659882A
Publication Date:
July 13, 1990
Filing Date:
September 10, 1982
Export Citation:
Assignee:
NITTAN CO LTD
International Classes:
G08B29/00; G08B26/00; G08B29/04; G08B29/14
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