Document Type and Number:
Japanese Patent JPH0520928
Kind Code:
B2
Abstract:
A symmetric finite impulse response filter for receiving a digital input signal and generates a filtered analog output signal for application to a balanced line, such as a tip and ring lead pair. Logic levels of predetermined symmetrical bit pairs of the digital input signal are detected and in response, predetermined corresponding capacitors are selectively switched between bias and reference voltages, thereby charging predetermined voltages proportional to the capacitances of the capacitors. The predetermined voltages are summed in an operational amplifier which, in response produces a filtered analog output signal. Individual capacitors are utilized for realizing each pair of symmetrical coefficients of the filter transfer function, resulting in considerable economy of size. A switched capacitor implementation results in high speed performance, simple design and low cost.
Inventors:
PIITAA GIRINGUHAMU
Application Number:
JP12204286A
Publication Date:
March 22, 1993
Filing Date:
May 26, 1986
Export Citation:
Assignee:
MITEL CORP
International Classes:
H03H15/00; H03H17/06; H03H19/00
Next Patent: CLAMP FOR FLAT CABLE