Title:
【発明の名称】ロード/ストアオペレーションのOUT-OF-ORDER実行の制御
Document Type and Number:
Japanese Patent JPH11512855
Kind Code:
A
Abstract:
Scheduler logic which tracks the relative age of stores with respect to a particular load (and of loads with respect to a particular store) allows a load-store execution controller constructed in accordance with the present invention to hold younger stores until the completion of older loads (and to hold younger loads until completion of older stores). Address matching logic allows a load-store execution controller constructed in accordance with the present invention to avoid load-store (and store-load) dependencies. Propagate-kill scan chains supply the relative age indications of loads with respect to stores (and of stores with respect to loads).
Inventors:
Favor, John Gee
Ben-Meer, Amos
Stapleton, Warren Gee
Tururu, Jeffrey Yee
Roberts, Mark Yee
Ben-Meer, Amos
Stapleton, Warren Gee
Tururu, Jeffrey Yee
Roberts, Mark Yee
Application Number:
JP51432697A
Publication Date:
November 02, 1999
Filing Date:
October 03, 1996
Export Citation:
Assignee:
Advanced Micro Devices Incorporated
International Classes:
G06F9/30; G06F9/318; G06F9/38; (IPC1-7): G06F9/38; G06F9/38
Domestic Patent References:
| JPS55147744A | 1980-11-17 | |||
| JPH04107634A | 1992-04-09 | |||
| JPH07160501A | 1995-06-23 | |||
| JPH08504977A | 1996-05-28 |
Attorney, Agent or Firm:
Youichi Oshima