Document Type and Number:
Japanese Patent JPS4732751
Kind Code:
A
Abstract:
1318673 Data processing systems INTERNATIONAL BUSINESS MACHINES CORP 22 Nov 1971 [10 March 1971] 54058/71 Heading G4A A plurality of processors are connected to a common element e.g. a store, through a common channel which includes circuits for timing the transmission of data through the channel by selectively employing timing signals from individual processors. When a processor requires access to the common element it issues a start signal, and if the element is not busy, clock signals from that processor are selected to time the transmission through the channels. A subsequent access request by a different processor before the common element becomes free results in the clock signals from the first processor being used for the data transfer between the second processor and the common element. Should two start signals from different processors coincide when the common element is not busy, a processor clock different to that last used is selected.
Application Number:
JP9834671A
Publication Date:
November 16, 1972
Filing Date:
December 07, 1971
Export Citation:
International Classes:
G06F1/12; G06F13/18; G06F13/42