Document Type and Number:
Japanese Patent JPS5178665
Kind Code:
A
Abstract:
The complementary metal-oxide-semiconductor technology is used to produce an integrated circuit with a negative resistance characteristic under voltage application to a given circuit region. A metal-oxide-semiconductor transistor of a first channel type has its gate connected to the switching nodes and its source-drain path in series with a load to operating voltage source. A second such transistor of opposite channel type has its source-drain path connecting the switching node to the operating voltage source terminal, coupled to the load. This second transistor gate is connected to the junction point of the load and the first transistor. Thus the application of a voltage to a given region at the switching node the source-drain path of the second transistor becomes conductive.
Inventors:
JOSEFU AARU KAUAARIERI
DEBIDO BII AADOREI
DEBIDO BII AADOREI
Application Number:
JP13221275A
Publication Date:
July 08, 1976
Filing Date:
November 05, 1975
Export Citation:
Assignee:
IBM
International Classes:
H03H1/00; H03H11/52; H03K3/3565; H03K5/02; H03K17/0416; H03K19/017; H04B3/18; (IPC1-7): H03H1/00