Document Type and Number:
Japanese Patent JPS5514587
Kind Code:
B2
Abstract:
A pilot signal cancelling circuit for an FM multiplex demodulator wherein the amplitude of the cancelling signal tracks that of the pilot signal contained in or mixed into the composite signal. The amplified composite signal is synchronously detected with the fixed amplitude 19 KHz pilot signal extracted by a phase lock loop 2, and the detector output is filtered to remove high frequency components and then converted to a current variation in a d.c. amplifier 13. The output of the latter is fed to a current controlled attenuator 14 together with the fixed amplitude pilot signal, and the level adjusted attenuator output is then inverted, divided into left and right channel components by the 38 KHz sub-carrier signals, and fed to adders in the multiplex demodulator outputs to cancel the pilot signal components therein.
Application Number:
JP4363676A
Publication Date:
April 17, 1980
Filing Date:
April 19, 1976
Export Citation:
International Classes:
H03D1/22; H04B1/10; H04H40/72; H04H1/00