Document Type and Number:
Japanese Patent JPS5543631
Kind Code:
B2
Abstract:
An improved method of MOS circuit fabrication includes: formation of a region of first selected material on the surface of underlying material, removal of less than all of the first selected material from selected regions of the underlying material, formation of a layer of insulating material between the first selected material and the underlying material, conversion of the first selected material to a second selected material, and removal of the second selected material to expose selected regions of the underlying material. In one embodiment the first selected material is an oxide of boron, while the second selected material is an oxide of phosphorous.
Application Number:
JP3986875A
Publication Date:
November 07, 1980
Filing Date:
April 03, 1975
Export Citation:
International Classes:
H01L29/78; H01L21/28; H01L21/283; H01L21/306; H01L21/336; H01L21/768; H01L23/29; H01L23/485; H01L23/522; H01L29/00