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Title:
COMPARISON AND ARITHMETIC DEVICE FOR ELECTRONIC COMPUTER
Document Type and Number:
Japanese Patent JPS58109932
Kind Code:
A
Abstract:

PURPOSE: To execute the comparison of data to be compared at a plurality of fixed data sections with one comparison and operation, by stopping the processing at the 2nd comparison circuit, when it is judged at the 1st comparison circuit that a comparison pattern data and a designation code are coincident.

CONSTITUTION: An instruction stored in an instruction register 1 is informed to a central processing unit of an electronic computer as comparison and instruction with a predetermined instruction code 1a and a comparison operator is active. The comparison and arithmetic device consists of a read circuit 4 which reads comparison pattern data 2 and data 3 to be compared according to a comparison pattern data head address 1e of comparison and instruction and data head address 1c to be compared, the 1st comparison circuit 5 comparing each character of a designation code 1b of comparison instruction and a comparison pattern data 2, the 2nd comparison circuit 6 comparing the data 2, 3 a control circuit 7 and a reading counter 6.


Inventors:
ISHIGURO HISASHI
Application Number:
JP21230481A
Publication Date:
June 30, 1983
Filing Date:
December 24, 1981
Export Citation:
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Assignee:
TOSHIBA ENGINEERING CO
International Classes:
G06F7/04; G06F7/02; G06F17/30; (IPC1-7): G06F7/02
Attorney, Agent or Firm:
Kazuo Sato



 
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