Title:
HIGH-SPEED FOURIER TRANSFORM OPERATING DEVICE
Document Type and Number:
Japanese Patent JPS5878255
Kind Code:
A
Abstract:
PURPOSE:To stabilize the operation of the device, by providing a buffer between a pipeline multiplier and a pipeline adder and storing the multiplication result in the buffer temporarily and executing the addition after the disturbance disappears in the pipeline processing of the adder. CONSTITUTION:A buffer due to a 2-port register 2 is provided between a multistage pipeline multiplier 1 and a multistage pipeline adder 5 to constitute a butterfly operator 100. A selector 3 is provided between the output of the register 2 and the adder 5, and a register 4 is connected between the output of the adder 5 and the selector 3. This operator 100 is used in a high-speed Fourier transform operating device, and one data is written in one machine cycle by the register 2, and the selector 3 and etc. are used to read two data simultaneously. The output from the multiplier 1 is written in the register 2 temporarily, and the output of the register 2 is inputted to the adder 5 simultaneously, thus stabilizing the operation of the operating device.
Inventors:
ABE SHIGEO
BANDOU TADAAKI
HIRASAWA KOUTAROU
IDE TOSHIYUKI
BANDOU TADAAKI
HIRASAWA KOUTAROU
IDE TOSHIYUKI
Application Number:
JP17569281A
Publication Date:
May 11, 1983
Filing Date:
November 04, 1981
Export Citation:
Assignee:
HITACHI LTD
International Classes:
G06F17/14; (IPC1-7): G06F15/332
Attorney, Agent or Firm:
Katsuo Ogawa (2 outside)