Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS5895837
Kind Code:
A
Abstract:
PURPOSE:To enable operation at high speed by forming a reverse conduction type region into a field region under a wiring layer. CONSTITUTION:The first N conduction type source regions 2, 2' and drain regions 3, 3' are shaped onto a P type silicon single crystal substrate 1 in mutually separated form, and gate oxide films 4, 4' by silicon dioxide and gate electrodes 5, 5' by N conduction type polysilicon are molded among the source regions and the drain regions. The second N conduction type semiconductor layer 14 having conduction type reverse to an insulating region 13 complementing active regions 12, 12' into which semiconductor elements uniting the N conduction type layers 2, 3, 2', 3' and the gate insulating films 4, 4' are formed is buried into the insulating region 13 so as not to contact with the active regions 12, 12'.
Inventors:
MIYAGI ISAMU
Application Number:
JP19308181A
Publication Date:
June 07, 1983
Filing Date:
December 01, 1981
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L29/78; H01L21/76; H01L21/762; H01L21/768; H01L23/522; (IPC1-7): H01L21/88; H01L29/78
Attorney, Agent or Firm:
Uchihara Shin