Japanese Patent JPS6212597

B2

PURPOSE:To shorten the access time and to prevent a wrong selecting action by maintaining a larger current for an upper word line in a transient period during which the voltage of the upper word line is equal to the non-selection voltage than the current of a non-selection mode and therefore securing high- speed rise of a holding current line and a word line of a memory circuit. CONSTITUTION:The levels VX of selected word lines 110 and 111 of a memory cell 100 are changed to a high level VXH from a low level VXL and then to the non-selection (VXL) from the selection (VXH). These switches are detected by a circuit 101. Then a circuit 102 delays properly the detection signal or increases the pulse width. At the same time, the detection signal is changed to a proper level and sent to a current switch circuit 103. The output of the circuit 102 is held at an output level until the line 110 is fixed completely at a holding level. Then the circuit 103 flows a current continuously for a period during which the level VX is fixed at a sufficiently low level from an instant that it is changed to the non-selection form the selection.

HONMA NORYUKI
YAMAGUCHI KUNIHIKO

JP1194486A

March 19, 1987

January 24, 1986

Click for automatic bibliography generation  

HITACHI LTD

H01L27/10; G11C11/34; G11C11/41; G11C11/414; G11C11/415

Previous Patent: The lower luminance detection system of an elevator display for indication

Next Patent: LIGHTWEIGHT CAST-COATED PAPER