Document Type and Number:
Japanese Patent JPS6411991
Kind Code:
B2
Abstract:
PURPOSE:To handle a picture consisting of many picture elements through simple constitution, by obtaining a shifted picture signal from an RAM in an output state while transferring data between two RAMs alternately. CONSTITUTION:When the (k)th line of a picture is scanned, a control circuit 9 places an RAM1 in an input state and an RAM2 in an output state. In this state, when a write signal is supplied, (k)th-line data is written in the D0 of the RAM1, and (k-1)th and (k-2)th line data are written in the D1 and D2 of the RAM1 from the RAM2. At this time, the data on the (k)th, (k-1)th, and (k-2)th lines are inputted to a shift register 7 and outputted to a picture processing logical device 8. Then, the circuit 9 places the RAM1 in an output state and the RAM2 in an input state. In this state, the data on (k)th, (k-1)th, and (k-2)th lines are written from the RAM1 to the RAM2 and also outputted to the register 7. Similarly, picture-shifted data are obtained from the register 7.
Inventors:
IMAMURA MAKOTO
MIKI NORIHISA
MIKI NORIHISA
Application Number:
JP16358581A
Publication Date:
February 28, 1989
Filing Date:
October 14, 1981
Export Citation:
Assignee:
YOKOGAWA ELECTRIC CORP
International Classes:
G06V10/36; G06T5/20; G06T11/00; H04N7/18