FEEDBACK TECHNIQUE AND FILTER AND METHOD

CROSS-REFERENCE TO RELATED APPLICATIONS)

[001] This application claims the benefit of the filing date of U.S. Provisional

Application 61/066,641, entitled "Novel feedback method to reduce area and power in continuous-time filters," filed February 22, 2008, which application is hereby incorporated by reference in its entirety.

BACKGROUND

[002] Continuous time filters may be used in a variety of analog circuit applications.

For example, many communications systems employ continuous time filters to filter out signal components above or below a frequency of interest, or otherwise modify the amplitude of a signal at a particular frequency or frequency range. DC components and high frequency noise may be filtered out, for example.

[003] A general example of a traditional bandpass filter 20 utilizing a differential amplifier is shown in Figure IA. A differential input signal including signals In ⁺ 10 and In ^" 1 1 is applied to the inputs of the differential amplifier 30. Input capacitors 25 and 26 are positioned between the differential input signal and the inputs of the differential amplifier 30. The differential amplifier 30 generates a differential output signal including Out ⁺ 50 and Out ^' 51. Capacitive feedback from the output of the differential amplifier 30 to the input is provided by feedback capacitors 35 and 36 having values C _f j,. Resistive feedback is also provided from the output of the differential amplifier 30 to the input by feed-back resistors 40 and 41 having values R _ft ,.

[004] A schematic graph of the frequency characteristics of the filter 20 is shown in

Figure IB, illustrating the gain across different frequencies of the amplifier. The slope of the gain changes at two frequencies, fo and f _\ , as shown. The frequency fo is generally related to Cn, and R^ and f i is generally related to the natural roll-off of the amplifier. The input and feedback capacitance may be used to set the overall filter gain. In this manner, the bandpass filter 20 generally amplifies signal components having frequencies between f ₀ and fi, while providing less amplification at, or attenuating, other frequencies.

BRIEF DESCRIPTION OF THE DRAWINGS

[005] Figure IA is a schematic diagram of a filter.

[006] Figure IB is a schematic illustration of a frequency response of the filter of

Figure IA.

[007] Figure 2 is a schematic diagram of a filter.

[008] Figure 3 is a schematic diagram of a filter.

[009] Figure 4 is a schematic diagram of a system including a filter.

DETAILED DESCRIPTION

[010] Certain details are set forth below to provide a sufficient understanding of embodiments of the invention. However, it will be clear to one skilled in the art that embodiments of the invention may be practiced without various of these particular details. Also, in some instances, well-known circuits, control signals, timing protocols, system blocks and software operations have not been shown in detail in order to avoid unnecessarily obscuring the described embodiments of the invention.

[011] Figure 2 is a schematic illustration of a filter 200 employing negative feedback.

The filter includes a differential amplifier 230 having input nodes 227, labeled Vj _PP in Figure 2, and 228, labeled Vj _11n in Figure 2. The differential amplifier 230 generates a differential output signal including the signals V _ON 250 and Vop 251 at output nodes 253 and 254, respectively.

[012] A resistor string 260 is coupled between the differential output signals 250 and

251. The resistor string 260 includes a plurality of resistive elements 261, 265, 267, and 263. Although four resistive elements are shown in Figure 2, generally any number may be used having substantially any value. The resistor string 260 may be used to provide common mode sense in a separate common mode feedback loop to the differential amplifier 230. That is, a voltage from a node 266 at a midpoint of the resistor string 260, CM _SENSE in Figure 2, may be fed back through the differential amplifier 230. Details of the common mode feedback circuit are not shown in Figure 2 for simplicity. Any type of common mode feedback may generally be used; in the Figure 2 example, the resistor string 260 is used to generate a common mode feedback voltage.

[013] The filter 200 employs feedback connected in a different manner than the feedback described above with reference to Figure 1. Feedback capacitor 235 is coupled between output node 253 and input node 227 of the differential amplifier. Feedback resistor 240 is coupled between an intermediate node of the resistor string 260 and the input node 227. The feedback resistor is coupled between the intermediate node 262, having a resistance R between the node 262 and the midpoint node 266, and a resistance of R(x-l) between the node 262 and the output node 253, where 'x' represents a total number of resistive elements of resistance R between the node 253 and the midpoint node 266. Accordingly, the voltage at the node 262 may be equal to V _on /x. By coupling the feedback resistor 240 to a node in the resistor string 260, only a portion of the voltage V _0n is fed back to the input of the amplifier 230 and the input node 227.

[014] By connecting the feedback resistor 240 between the input node 227 and an intermediate node of the resistor string 260, a smaller feedback capacitor 235 and input capacitor 225 may be used. Accordingly, the feedback capacitor 235 and input capacitor 225 are shown as having capacitance C^/x and CJ- x, respectively, in Figure 2. Without being bound by theory, the reduction of capacitance values can be seen by performing Kirchoff s Current Law (KCL), specifying that the sum of currents at a node will be zero, at the input node 227. Accordingly, the sum of current entering the node 227 from the feedback capacitor 235, feedback resistor 240, and input capacitor 225 will be zero. By coupling the feedback resistor 240 between the intermediate node 262 of the common mode feedback resistor string 260 and the input node 227, a reduced voltage of V _on /x is developed across the feedback resistor 240. The current through the feedback resistor may be represented as Rf _b *Vo _N /x- The current from the feedback capacitor having capacitance Cft/x is represented as sC _ft /x. The current from the input capacitor having capacitance C, _n /x is represented as sCj _n /x. KCL then yields an inverting transfer function for the filter 200:

[016] Note that the transfer function above is the same result as a corresponding analysis for a filter having capacitances Ca and Cj _n , but having the resistance R _fb coupled directly to VQ _N - Accordingly, by coupling the feedback resistor R^, to a lower

voltage node (V _ON /X in this example), for the same feedback resistor value R^, the feedback capacitor C _f o may also be reduced by a factor of x while preserving an effective R^* C^ time constant for the filter. Similarly, the capacitance of the input capacitor 225 may also be reduced by a factor of x, while preserving the transfer function and ratio of the input capacitance to the feedback capacitance, a ratio that is related to the gain of the filter.

[017] In an analogous manner for feedback between a second differential input node

228 and output node 254, the capacitances of input capacitor 226 and feedback capacitor 236 coupled to a differential input node 228 may be reduced. A feedback resistor 241 is coupled between an intermediate node 264 of the common mode feedback resistor string 260. The intermediate node 264 is coupled to the midpoint node 266 by a resistance R, and to a differential output signal Vop 251 by a resistance R(x-l). Accordingly, the voltage at the node 264 may be equal to Vop/x.

[018] Although the resistor string 260 of Figure 2 is shown having four resistive elements, any number may be present, and other numbers may be used in other examples. Any elements having a resistance, including resistors of any kind, may be used to element the resistor string 260. A resistance R(x-l) between the intermediate node and the filter output may be significantly smaller than the feedback resistance Rn, in some examples, to reduce any adverse effects from the presence of the resistance R(x-1 ) on the frequency response of the filter. Although feedback is provided between inputs and outputs of a differential amplifier 230 in Figure 2, an analogous feedback technique may be used to reduce capacitance sizes for feedback around other devices in other examples. The filter 200 of Figure 2 is exemplary only, and other electrical components may be provided or omitted in other examples, in addition to, or between elements discussed with regard to Figure 2. The input capacitors 225 and 226 are shown in Figure 2 as variable capacitors to set a variable gain of the filter 200; however, in other examples, the input capacitors 225 and 226 may not be variable.

[019] For a given resistor value, and thus resistor size, the ability to reduce the feedback capacitance, input capacitance, or both, as described above, may have a variety of advantages. Generally, for filters such as the filter 200, reducing power consumption, area, or both, of the filter is desirable in that more die may be fabricated per semiconductor wafer, yielding a cheaper product in a less expensive package.

Further, lower power consumption may be desired in products where power consumption is a factor in evaluating competing designs.

[02Oj Capacitive loading at the output of the amplifier 230 affects the achievable bandwidth of the filter 200. To obtain desired bandwidth performance, power may need to be increased to drive a capacitive load at the output nodes 253 and 254. By reducing the capacitance of the feedback capacitors 235 and 236, capacitive loading at the output nodes may be reduced, and less power may be required to achieve desired bandwidth of the filter 200. However, the bandwidth is also affected by the product of the feedback capacitance Cf ₀ and the feedback resistance R^. The C _fb* Rf _b product affects the pole and zero locations for the filter response. As described in examples above, however, capacitive loading, in terms of the capacitance of the feedback and input capacitors, may be reduced while maintaining a same effective R* C product when a feedback resistor is coupled to an intermediate node of a resistor string tied between differential amplifier outputs instead of coupling the feedback resistor directly to an output node of the differential amplifier.

[021] Another advantage may be gained in some examples by reducing a size of the input capacitors 225 and 226 in Figure 2. Namely, reduced input capacitances may allow smaller transistor switches to be used (transistor switches not shown in Figure 2) in a switched-capacitor implementation. Transistor switches may also or alternatively be used to vary the capacitance Q. Smaller transistor switches may yield power savings for the filter 200.

[022] Not all of the advantages described herein may be achieved in each example or implementation of feedback described herein. The advantages described are not intended to limit the applications or examples of filters, devices, or feedback implementations achievable. Rather, the advantages are provided to allow those skilled in the art to appreciate some of the performance variables that may be manipulated using examples described.

[023] In some examples, disadvantages may occur. For example, input-referred offset and output-referred noise, metrics that may affect the dynamic range and fidelity of a signal receive path, may be adversely affected in some examples. However, benefits attained from advantages described may outweigh the adverse affects from input- referred offset and output-referred noise occurring when a feedback resistor is coupled

to an intermediate node in a resistor string tied between differential outputs. Those skilled in the art will appreciate these design trade-offs in selecting an implementation suitable for desired performance specifications.

[024] Another example of a filter 300 is shown in Figure 3. Like elements in Figure 3 are labeled with like reference numerals from Figure 2, and filter operation is analogous. The filter 300, however, makes use of the resistor string 260 for an additional purpose. In particular, dynamic offset cancellation currents IBLW_N 310 and IBLW_P 31 1 are coupled to intermediate nodes 262 and 264 of the resistor string 260, respectively. The dynamic offset cancellation currents are generated in another circuit block (not shown in Figure 3), such as a current digital to analog converter, and may compensate for non-idealities in the amplifier 230. Routing the dynamic offset cancellation currents 310 and 311 through at least a portion of the resistor string 260 already present for common mode feedback purposes reduces capacitive and resistive loading at the output of the amplifier 230 by eliminating or reducing the nee.d for additional capacitive or resistive elements, or both to be provided specifically for the dynamic offset cancellation currents.

[025] The filter 300 accordingly employs the resistor string 260 to provide common mode feedback, to provide a reduced feedback voltage to the feedback resistors 240 and 241, and to provide dynamic offset cancellation. In other examples, it should be understood that any combination of these features may be provided by the resistor string 260. In some examples, the feedback resistors 240 and 241 may be coupled to the output nodes 253 and 254, respectively, instead of intermediate nodes of the resistive string 260, and the resistive string 260 used to provide common mode feedback and dynamic offset cancellation. In this manner, some of the capacitance reductions in the feedback and input capacitances may not be achieved as described above, but output loading may be reduced by use of the resistor string 260 to provide dynamic offset cancellation.

[026] Figure 4 is a schematic illustration of an example system 400 including a receive signal path 410. Examples of filters described above, such as the filter 200 may be used in the receive signal path of a baseband data communications system 400. The filter 200 may perform functions of high pass filter 412 and programmable gain amplifier 414, and may include dynamic offset cancellation provided by a variable

baseline wander current 416. Generally, a differential receive signal 420 may be received by the filter 200, and the filtered and amplified signal may be provided to additional filter blocks, such as a low pass filter 424 to further filter noise. The filter 424 is optional, and additional or other filters may also be provided. The filtered signal is provided to an analog to digital converter 426 for conversion to a digital signal that may be provided to a digital signal processor (not shown). The general receive signal path 410 may be used to process substantially any type of received signal having any frequency properties. In some examples, the receive signal path is used in an 800MHz clocked Ethernet system.

[027] The system 400 shown in Figure 4 includes additional components used to achieve full duplex operation of a transceiver. Full-duplex operation will now be described, however, in other examples, it is to be understood that receive and transmit signals may be processed using separate paths.

[028] In full duplex operation, a locally generated transmit signal, as well as a received signal from a link partner, may be superimposed on a same physical medium, such as a CAT6 cable 430. The cable 430 is coupled to an interface 432 and a transformer 434 couples the superimposed signal onto a chip for coupling to a hybrid block 440. A line driver 450 generates the local transmit signal, and couples the local transmit signal to the transformer 434 for coupling to the interface 432. Accordingly, a superimposed signal containing both a locally generated transmit signal and a received signal, may be present at the input to the hybrid block 440. The locally generated transmit signal may generally be stronger than the received signal, which may have passed through a noisy medium, or traveled over a lossy path prior to receipt at the interface 432.

[029] The hybrid block 440 cancels out the locally generated transmit signal from the superimposed signal at the input of the hybrid block 440. In this manner, substantially only the received signal may be applied to the receive signal path 410. The power requirements for the hybrid block 440 may be reduced through use of techniques described above that may reduce capacitance sizes and power requirements of the filter 200. That is, by reducing power requirements of the filter 200, the power consumption of the hybrid block 440 may be reduced.

[030] The system 400 may be supplied in any of a variety of communications devices for processing received signals, transmitted signals, or both. Devices employing examples of the system 400 may include, but are not limited to, laptop computers, desktop computers, cellular telephones, and other mobile devices.

[031] From the foregoing it will be appreciated that, although specific embodiments of the invention have been described herein for purposes of illustration, various modifications may be made without deviating from the spirit and scope of the invention.