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Patent Searching and Data


Title:
ACCESS CONTROLLING SYSTEM FOR MEMORY
Document Type and Number:
Japanese Patent JPS5854461
Kind Code:
A
Abstract:

PURPOSE: To practically expand an address space by assigning program memories and a refresh memory in the same address and selecting a READ or WRITE mode to access said address.

CONSTITUTION: Program memories and a refresh memory for CRT are assigned to a single address space. A ROM2 and RAM3 are prepared for the program memoies and a VRAM6 for the refresh memory. These program memories and refresh memory are assigned in the same address on the address space and memory accessing method to the address is switched in accordance with READ or WRITE memory access. When a read-out request to the VRAM6 is generated, the access to the program memoreis is inhibited or these memories are assigned again to another area to make the read-out function available and read out the VRAM.


Inventors:
ISHII TAKAYOSHI
Application Number:
JP15338481A
Publication Date:
March 31, 1983
Filing Date:
September 28, 1981
Export Citation:
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Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
G06F3/153; G06F3/14; G06F12/06; G06F13/00; (IPC1-7): G06F3/14; G06F13/00
Attorney, Agent or Firm:
Kiyoshi Inomata