Title:
ACTIVE MATRIX SUBSTRATE AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP3108998
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To eliminate the generation of the defect caused by the short circuit in a display region by dividing the driving circuit into plural regions, alternatively arranging the regions while sandwitching a pixel region and pulling out the wirings for the anodizing of gate electrodes from the places where no driving circuit exists.
SOLUTION: The signal side driving circuit of the driving circuit is divided into plural regions DAR1 to DAR3 and the regions DAR1 to DAR3 are alternatively arranged while sandwitching the display region. Moreover, a scanning line side driving circuit is divided into plural regions SAR1 to SAR3 and are alternatively arranged while sandwitching the display region. In this case, the gate electrode of the display region is the Ta, which is formed by the process that is same as the process of making the scanning lines. The electrode is electrically connected to a terminal AXC on a glass substrate through a wiring AXL on which the Ta is formed with the same process. The wiring AXL used for anodizing is formed to the opposite side with respect to the region, in which the scanning line side driving circuit, or the region in which no scanning line side driving circuit is formed.
Inventors:
Tsutomu Hashizume
Application Number:
JP24382498A
Publication Date:
November 13, 2000
Filing Date:
August 28, 1998
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
G02F1/136; G02F1/1343; G02F1/1345; G02F1/1368; G09F9/30; H01L27/12; H01L29/786; (IPC1-7): G02F1/1368; G02F1/1343; G02F1/1345
Domestic Patent References:
| JP2210420A |
Attorney, Agent or Firm:
Kisaburo Suzuki (2 outside)