To obtain an address converting circuit which can converts a virtual address requested to be accessed into a physical address at a high speed.

This address converting circuit is equipped with a CLA circuit 101, adders 102 and 103, a CAM 104, a carry-out selection part 105, a physical address storage part 106, and a physical address selection part 107. When the high-order side bit arrays of a base address requested to be accessed and an offset address are added together, the addition of the high-order side bit arrays when a carry-out signal is supposed to be '0' and the addition of the high-order side bit arrays when '1' are carried out before the carry-out signal from the low-order side bit array is operated; and one of those addition results is selected with the carry-out signal and a comparing processing is performed, so the conversion to a physical address can be performed at a high speed.