ADDRESS MANAGEMENT DEVICE

Title:

ADDRESS MANAGEMENT DEVICE

Document Type and Number:

Japanese Patent JPS63137343

Kind Code:

A

Abstract:

PURPOSE: To improve a processing speed by forming two common areas in a logical address space and mutually accessing opposite common areas.

CONSTITUTION: In addition to a segment register 1, three registers consisting of a transitted segment register 5, a start block register 6 and an end block register 7 are formed. Comparators 8, 9 and an AND gate 10 decides whether a logical block number specified by a logical address register 2 is included within a block area specified by the registers 6, 7 or not. Gates 11, 12 and a NOT gate 13 outputs either one of a segment number registered in the register 1 and a transitted segment number registered in a transitted segment register 5 and applies the selected output to an address conversion table 3.

Inventors:

YAMASHITA NOBORU

Application Number:

JP28312586A

Publication Date:

June 09, 1988

Filing Date:

November 29, 1986

Export Citation:

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Assignee:

TOSHIBA CORP

International Classes:

G06F12/10; G06F12/02; (IPC1-7): G06F12/02; G06F12/10

Attorney, Agent or Firm:

Yasuo Miyoshi

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