PURPOSE: To compress the scale of a circuit, by comparing the output of a first level shift means with that of a second level shift means, and sending corresponding output.

CONSTITUTION: In the first level shift means 5, a first offset voltage is outputted when a voltage difference between an input voltage and the first offset voltage is less than a first preset level shift voltage, and a differential voltage is outputted when the former exceeds the latter. Meanwhile, in the second level shift means 6 after an input voltage is voltage-divided by a voltage division means 4, a second offset voltage is outputted when the voltage reference between the output voltage of the voltage division means 4 and the second offset voltage is less than a second preset level shift voltage, and the differential voltage is outputted when the former exceeds the latter. Thereby, a difference is generated between the output of the level shift means 5 and 6 to be inputted to a comparator 7, and it is possible to attach positive and negative polarity on the difference within and outside a constant range. In such a way, it is possible to compress the scale of the circuit.