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Title:
ALARM SEQUENCE CIRCUIT
Document Type and Number:
Japanese Patent JPH04241096
Kind Code:
A
Abstract:

PURPOSE: To reduce man-hour for design by providing a common part to be used in common even when the pattern of an alarm sequence is changed, and individual parts to require changes with the change of the pattern.

CONSTITUTION: When the data of the first bit is '1' among the data of four bits to be inputted to an input filter 21, the address of 10001000000 is added to a ROM 51, and a totally '0' address is applied to a ROM 52. In this case, the fifth bit is the output of a latch 32 and for the 12th bit, the output of a frequency divider is changed to '1' or '0'. On the other hand, since addresses 00000 and 10000 are outputted from the ROM 51, the output corresponding to the address of the first bit is the alternate data of '1' and '0'. Since this alternating data is applied through a driver 52 to a correspondent lamp, this lamp is turned on with flicker. Thus, the common part is used as it is, and the contents of a table to be written in the ROM are reloaded.


Inventors:
KAGEYAMA KOICHI
Application Number:
JP743791A
Publication Date:
August 28, 1992
Filing Date:
January 25, 1991
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G08B7/00; G08B23/00; G08B25/00; (IPC1-7): G08B7/00; G08B23/00; G08B25/00
Attorney, Agent or Firm:
Sadaichi Igita



 
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