Title:
AMPLIFICATION DEVICE
Document Type and Number:
Japanese Patent JP2021150821
Kind Code:
A
Abstract:
To provide an amplification device that can be easily designed so that a desired gain is obtained.SOLUTION: An amplification device 1A includes an amplification unit 10 and a bias potential applying unit 20. The amplification unit 10 includes MOS transistors M11 and M12 forming an input differential pair, resistors R11 and R12, and a MOS transistor M13 acting as a current source. The bias potential applying unit 20 includes MOS transistors M21, M22, M23, M24, M25, and M26, and a resistor R2. The MOS transistors M21, M22, M24, M25, and M26, and the resistor R2 include a structure of a beta multiplier. The MOS transistors that form the MOS transistors M11, M12, M21, and M22 have equal β.SELECTED DRAWING: Figure 2
Inventors:
KUBO SHUNICHI
MIURA MASARU
MIURA MASARU
Application Number:
JP2020049141A
Publication Date:
September 27, 2021
Filing Date:
March 19, 2020
Export Citation:
Assignee:
THINE ELECTRONICS INC
International Classes:
H03F3/45; H03F3/345
Attorney, Agent or Firm:
Yoshiki Hasegawa
Yoshiki Kuroki
Masatoshi Shibata
Yoshiki Kuroki
Masatoshi Shibata