To provide an analog monitor circuit which is suitable for an ASIC, requires a smaller number of external components and is low in cost.

The analog monitor circuit is provided with a register 31, an accumulator 33 provided in the register 31 and an arithmetic adder 32 which adds the values of the register 31 and accumulator 33, the accumulator 33 holding the output of the arithmetic adder 32 with a clock CK. When the LSB of the register 31 is zero, ORing the overflow of the arithmetic adder 32 and the clock CK is made. When the MBS of the register 31 is 1, the clock CK is synthesized to be L by ANDing the non-overflow of the computation adder 32 and the clock CK, and the signal synthesizing the overflow and the clock CK is integrated, and then an analog voltage is obtained.